Recently I was building an ADC front-end filter for a data acquisition board. The formula fc = 1/(2πRC) had to be worked out on a calculator every time, and knowing only fc was not enough—I also needed to know exactly how much attenuation occurs at a specific frequency and whether the filter would slow down the response. Later I used an online RC filter calculator: fill in three parameters and the results come out. I'm writing down the usage and a few real measurements as notes for future reference.
Tool URL: https://www.dd-cat.cn/tools/rc-filter
Three Inputs, Just the Outputs You Need
The inputs are three numbers: resistance R (unit: kΩ), capacitance C (unit: nF), and observation frequency f (unit: Hz; enter 0 to calculate only the cutoff frequency and skip attenuation).
The outputs are:
- -3dB cutoff frequency fc: applies to both low-pass and high-pass; at this point gain drops about 3dB and phase lags about 45°;
- Time constant τ = RC: the time for the capacitor to charge to 63.2% under a step input; 5τ is essentially considered settled;
- Gain at any frequency: shows both dB and amplitude ratio, with the note 'first-order, -20dB/decade';
- Circuit diagram and Bode plot: low-pass (R in series, C to ground) and high-pass (C in series, R to ground) diagrams update with the parameters; the Bode plot marks the fc red line and the observation frequency.
Change one number and the result updates immediately. The current parameters are synced into the URL, so when you share the link with a colleague they see exactly the same values—no screenshots needed to compare parameters.
One Real Use: ADC Anti-Aliasing
The default parameters are the common R = 1kΩ, C = 100nF, f = 1kHz:
- fc ≈ 1.59 kHz;
- τ = 100 µs;
- At 1 kHz it is about -1.4 dB, essentially no loss in the passband.
This is exactly the most common combination for ADC front ends. According to the sampling theorem, interference above half the sample rate (fs/2) folds into the band and digital filtering cannot recover it, so you must use an analog low-pass filter to suppress high frequencies before the ADC. For example, with 100 kHz sampling, placing fc at a few kHz gives almost no passband attenuation while still providing out-of-band rejection.
Change f to 10 kHz and recalculate: f/fc ≈ 6.3, gain is about -16 dB (amplitude ×0.157). After one octave beyond fc, a first-order network drops another 20 dB per decade, which clearly suppresses out-of-band spikes.
Three Other Scenarios I've Used
PWM to Analog
MCUs without a true DAC often use PWM plus a low-pass filter to approximate a DC level. With 10 kHz PWM, R = 1kΩ, C = 100nF, fc ≈ 1.59 kHz, and the 10 kHz fundamental is about -16 dB. To reduce ripple further, lower fc or move to a second-order filter, but accept slower settling: τ = 100 µs means 5τ = 0.5 ms to settle to 99.3%. These two are two sides of the same coin.
High-Pass AC Coupling
Put C in series and R to ground and it becomes a high-pass filter, used to block DC. For audio inputs, C = 1µF and R = 10kΩ are common, giving fc ≈ 15.9 Hz and τ = 10 ms. Above 20 Hz there is essentially no loss, and DC is completely blocked. The diagram automatically switches to the high-pass connection, helping avoid reversing the low-pass/high-pass configuration.
Slow Start and Debouncing
Reset stretching, power-on slow start, and key debouncing are all essentially RC charge/discharge timing. With R = 10kΩ and C = 1µF, τ = 10 ms and 5τ = 50 ms; compare the τ from the tool directly to judge whether the response is fast enough.
Quick Reference for Common Combinations
| R | C | fc | τ | What I often use it for |
|---|---|---|---|---|
| 1 kΩ | 100 nF | ≈ 1.59 kHz | 100 µs | ADC anti-aliasing, PWM smoothing |
| 4.7 kΩ | 100 nF | ≈ 339 Hz | 470 µs | Slow-signal conditioning |
| 10 kΩ | 100 nF | ≈ 159 Hz | 1 ms | Low-frequency noise removal |
| 10 kΩ | 1 µF | ≈ 15.9 Hz | 10 ms | AC coupling, DC blocking |
| 100 Ω | 10 nF | ≈ 159 kHz | 1 µs | High-speed signal bandwidth limiting |
A Few Notes
- Know the low-pass / high-pass configuration: low-pass has R in series, C to ground, output taken across C; high-pass has C in series, R to ground, output taken across R. Both use the same fc = 1/(2πRC) formula; only the output point differs.
- First-order means -20dB/decade: for a steeper transition band, cascade into second order or higher.
- τ determines settling speed: 1τ reaches 63.2%, 3τ reaches 95%, 5τ reaches 99.3%. Deeper filtering means slower response.
- Capacitor selection: prefer NP0/C0G (small capacitance, temperature-stable) or X7R (moderate capacitance); avoid Y5V-type parts with obvious temperature drift and piezoelectric effects. Don't make the resistance too large, or it may divide voltage with the next stage's input impedance and cause errors.
How to Read the Bode Plot
For the low-pass plot: the magnitude trace is flat near 0dB at low frequencies, then after fc (red line) it falls at -20dB/decade, and at fc it is exactly -3dB. The phase trace is -45° at fc, approaching 0° at low frequencies and -90° at high frequencies (high-pass is the mirror image). The f you enter is marked as the observation frequency on the magnitude curve, so you can see at a glance how much attenuation occurs at that frequency.
One conclusion: the formula is simple, but the 'next' steps—how much attenuation at a given frequency, how slow the response—are all calculated for you. The link is now in my bookmarks, ready to use together with the voltage divider and LC resonance tools.