How wide does a trace need to be for 2A? The answer isn't simply “the wider the better”: with 1oz copper, an allowed temperature rise of 10°C, and external-layer routing, the minimum trace width is about 0.79mm, rounded to 0.8mm in engineering practice. Later I found an online PCB current-carrying trace width calculator that can work this out backwards—enter current, copper thickness, temperature rise, and routing layer, and it calculates the minimum trace width per IPC-2221 and rounds it to 0.1mm. I've jotted down the usage and a few test runs as notes for future reference.
Tool: https://www.dd-cat.cn/tools/pcb-width
Formula and Approach: Working Backwards from IPC-2221
The current-carrying formula is I = k · ΔT^0.44 · A^0.725, where A is the copper cross-sectional area (in mil²) and ΔT is the allowed temperature rise; k = 0.048 for external layers and k = 0.024 for internal layers (internal layers dissipate heat poorly, so k is only half). The tool works the formula backwards:
A = (I / k)^(1/0.725)computes the required cross-sectional area;W = A / Tdivides by the copper thickness T (1oz = 1.37mil = 34.8µm; 2oz doubles);- finally, round the millimeter value up to 0.1mm—better too wide than too narrow.
There are just four inputs: operating current I, copper thickness (0.5 / 1 / 2 / 3oz), allowed temperature rise ΔT, and routing layer (external / internal). Outputs include the minimum trace width (in both mm and mil), a recommended value, the required cross-sectional area, plus a trace cross-section diagram labeled W, T, and I.
External vs. Internal Layers: About 2.6× Difference for the Same Current
For the same 2A, 1oz, and ΔT = 10°C: the external layer minimum width is about 0.79mm, but the internal layer needs 2.04mm. The reason is that internal layers have no convective air cooling, k is only half of the external value, and the required cross-sectional area is about 2.6 times larger.
This difference matters a lot during layout: keep power trunk traces on the outer layer if possible; if you must route them internally, budget roughly 2.6× the width, otherwise the temperature rise will exceed the limit.
Two Direct, Effective Levers: Copper Thickness and Temperature Rise
Doubling Copper Thickness Halves the Width
At 2A, ΔT = 10°C, external layer, 1oz needs 0.79mm, but switching to 2oz needs only 0.39mm. The required cross-sectional area stays the same; doubling copper thickness naturally halves the width. When space is tight and you don't want to add layers, 2oz copper is a common solution.
Relaxing the Temperature Rise Also Reduces Width
At 2A, 1oz, external layer, relaxing ΔT from 10°C to 20°C lowers the width from 0.79mm to 0.52mm, at the cost of a hotter trace. The choice of ΔT depends on ambient temperature and lifetime requirements; the tool's default 10°C is a fairly conservative baseline.
A Small Detail: Rounding to 0.1mm
The calculated minimum width is often not a multiple of 0.1mm, so the tool rounds up. For example, at 1A, 1oz, external layer, the minimum is 0.30mm, and the rounded recommendation is 0.4mm. Rounding down seems to save a little space, but it eliminates the current margin—don't cut corners here.
Quick Reference for Common Currents (ΔT = 10°C)
| Current | External 1oz | Internal 1oz | External 2oz |
|---|---|---|---|
| 1A | 0.4mm | 0.8mm | 0.2mm |
| 2A | 0.8mm | 2.1mm | 0.4mm |
| 3A | 1.4mm | 3.6mm | 0.7mm |
| 5A | 2.8mm | 7.3mm | 1.4mm |
| 10A | 7.3mm | 18.9mm | 3.7mm |
The table above shows the tool's recommended values (already rounded to 0.1mm). At the 10A level, routing a 7mm-wide trace is no longer practical—in practice you'd use copper pours with via arrays or go straight to a solid power plane.
A Few Notes
- Consider doubling power trunk traces: the tool gives the minimum width that meets the temperature rise; routing power trunk traces at 2× the calculated value is safer. When space is tight, switch to copper pour + via arrays.
- Watch the fab's minimum trace width: low-current calculations may come in below 0.2mm, so verify the PCB manufacturer's minimum trace width/spacing capability first.
- IPC-2221 is an empirical model: for long-term full load or high-temperature environments, add at least 30% margin on top of the result.
- Don't mix mil and mm: the tool gives both mm and mil, and 1oz = 1.37mil = 34.8µm—be careful with units when converting.
Conclusion
The hard part of current-carrying trace width isn't the formula—it's the three steps of working backwards, rounding, and accounting for internal vs. external layer differences. This tool handles all three at once. I run it before routing to fix the power trunk width, then move into the EDA to route. The link is saved in my bookmarks, alongside the differential impedance and feedback resistor tools.